Top 20 list
A single Socket machine is about to get in the top 3
There is machines with 4 sockets behind ...

hehehe

who?

Top 20 list
A single Socket machine is about to get in the top 3
There is machines with 4 sockets behind ...

hehehe

who?

You mean 341221 ?
The Core2Quad

I think they have already been up there (XtremeSystems where using Core2Quad when they where here, though they where not called Core2Quad then)

Though if some of thoose 4 CPU machines put dual/quadcores in then who would be laughing, well Rosetta@Home for one :-D

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Team mauisun.org

Top 20 list
A single Socket machine is about to get in the top 3
There is machines with 4 sockets behind ...

hehehe

who?

You mean 341221 ?
The Core2Quad

I think they have already been up there (XtremeSystems where using Core2Quad when they where here, though they where not called Core2Quad then)

Though if some of thoose 4 CPU machines put dual/quadcores in then who would be laughing, well Rosetta@Home for one :-D

The number 1 is yet an AMD with 4 Dual cores ... let's see if a QX6700 can get pass this very expensive AMD system.

Who?

341221 is number 2

60 RAC units to go!
who?

341221 is number 2

60 RAC units to go!
who?

Interesting. BOINCstats sees it as 2(4), meaning 2 chips with 2 threads each. Not 1(4). I wonder why.


http://www.boincstats.com/stats/host_graph.php?pr=rosetta&id=341221

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Reno, NV
Team: SETI.USA

Interesting. BOINCstats sees it as 2(4), meaning 2 chips with 2 threads each. Not 1(4). I wonder why.

The "Kentsfield" (Desktop) CPUs are composed of two "Conroe" cores, thus they are a 2x2 processor rather than 1x4. I guess the system somehow sees that.

Interesting. BOINCstats sees it as 2(4), meaning 2 chips with 2 threads each. Not 1(4). I wonder why.

The "Kentsfield" (Desktop) CPUs are composed of two "Conroe" cores, thus they are a 2x2 processor rather than 1x4. I guess the system somehow sees that.

That's a bug then, the BIOS and the Microcode of the CPU expose 1 Physical, 4 Cores. Somebody did not code it properly on the BOINC stats.

Who?

Interesting. BOINCstats sees it as 2(4), meaning 2 chips with 2 threads each. Not 1(4). I wonder why.

The "Kentsfield" (Desktop) CPUs are composed of two "Conroe" cores, thus they are a 2x2 processor rather than 1x4. I guess the system somehow sees that.

The first number should be the number of sockets.

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Reno, NV
Team: SETI.USA

Interesting. BOINCstats sees it as 2(4), meaning 2 chips with 2 threads each. Not 1(4). I wonder why.

The "Kentsfield" (Desktop) CPUs are composed of two "Conroe" cores, thus they are a 2x2 processor rather than 1x4. I guess the system somehow sees that.

The first number should be the number of sockets.

Correct! and Qx6700 has 1 socket, not 2.

Who?

The first number should be the number of sockets.

Correct! and Qx6700 has 1 socket, not 2.

I posted about this in the BOINCstats forum today. They are usually *very* quick to make fixes.

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Reno, NV
Team: SETI.USA

The first number should be the number of sockets.

Correct! and Qx6700 has 1 socket, not 2.

I posted about this in the BOINCstats forum today. They are usually *very* quick to make fixes.

In this case it may not be a BoincStats error - my guess would be that this info has come from the project in the cpu string, and comes from the BOINC client. Even the client may not be at fault if the info is passed to it by a standard OS call. So worth mentioning over there, but don't be surprised if Willy says it is not his problem this time.

But it occurs to me that with the introduction of multi-levels of cores within a real core (hyperthreading) we need a three-deep count of cpus. In the three deep count I'd describe this box as 1(2(4)) sockets(cores(virtual cores)).

Just a thought
River~~

But it occurs to me that with the introduction of multi-levels of cores within a real core (hyperthreading) we need a three-deep count of cpus. In the three deep count I'd describe this box as 1(2(4)) sockets(cores(virtual cores)).

Good call. "Threads" is the term I have heard for what you call "virtual cores".

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Reno, NV
Team: SETI.USA

But it occurs to me that with the introduction of multi-levels of cores within a real core (hyperthreading) we need a three-deep count of cpus. In the three deep count I'd describe this box as 1(2(4)) sockets(cores(virtual cores)).

Good call. "Threads" is the term I have heard for what you call "virtual cores".

You are right: I have heard "threads" used in that way too.

I personally feel it is more helpful to keep the idea of "threads" as a property of the software and "virtual cores" as a property of the hardware.

Code can be multi-threaded even on a single core cpu - the different threads are time-sliced by the operating system. On a sotware level we do not think of threads as meaning running two unrelated programs at once - that is multi-tasking.

In contrast, the virtual cores of (say) an intel HT chip can be running two threads from a single process, or can be running two unthreaded processes, or one thread from each of two different processes. This is sufficiently different from threading in the software sense to need a different term, in my opinion.

And because both happen at the same time there will be all sorts of ambiguity if the same word is used for both ideas.

R~~

But it occurs to me that with the introduction of multi-levels of cores within a real core (hyperthreading) we need a three-deep count of cpus. In the three deep count I'd describe this box as 1(2(4)) sockets(cores(virtual cores)).

Good call. "Threads" is the term I have heard for what you call "virtual cores".

You are right: I have heard "threads" used in that way too.

I personally feel it is more helpful to keep the idea of "threads" as a property of the software and "virtual cores" as a property of the hardware.

Code can be multi-threaded even on a single core cpu - the different threads are time-sliced by the operating system. On a sotware level we do not think of threads as meaning running two unrelated programs at once - that is multi-tasking.

In contrast, the virtual cores of (say) an intel HT chip can be running two threads from a single process, or can be running two unthreaded processes, or one thread from each of two different processes. This is sufficiently different from threading in the software sense to need a different term, in my opinion.

And because both happen at the same time there will be all sorts of ambiguity if the same word is used for both ideas.

R~~

The right way to define the CPUs "threads" is the following:

xPnCyT == X number of physical processor, n number of core, y number of threads

a presler is a 1P2C4T while a QX6700 is a 1P4C4T

That is what we use, just a little simplified

who?

The right way to define the CPUs "threads" is ...

Right as defined by ...?

The right way to define the CPUs "threads" is ...

Right as defined by ...?

Right as the terminology we use when we design CPU ;)

Who?
For more info about me, see SETI forum

The right way to define the CPUs "threads" is ...

Right as defined by ...?

Right as the terminology we use when we design CPU ;)

Who?
For more info about me, see SETI forum

You do know the Rosetta@Home source code is available...

Mr Senior Performance Analyst
Merom, Conroe
Intel Corp

;-)

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Team mauisun.org

Where can i get the code of Rosetta?
I got the one from SETI, did not find the code of Rosetta :(

PS: let's be clear, I am doing the BOINC stuff by my own, my employer does not support, does not help what I do here. They even dissagree some time ;)


who?

Where can i get the code of Rosetta?
I got the one from SETI, did not find the code of Rosetta :(

PS: let's be clear, I am doing the BOINC stuff by my own, my employer does not support, does not help what I do here. They even dissagree some time ;)


who?

I know you do it on your own :-)

It's not open to the public in true open source style, River or another mod or even email David Kim or David Baker should be able to advise you.

There are a few people here like Mats Petersson who are looking at the code.
The official way to get it is to go through http://depts.washington.edu/ventures/UW_Technology/Express_Licenses/Rosetta/ found on http://www.bakerlab.org

They had the idea of making the source opensource near the start but where advised not to while the project got started, mainly since there is a lot more to the code than Seti. And other projects and Universities use the 'Rosetta' code (which is different to the Rosetta@Home code afaik but based on the same 'group of code')

Anyways, Mats will know how and what to do.


EDIT to add some background
https://boinc.bakerlab.org/rosetta/forum_thread.php?id=2111#24210 Mentioning recently how to get the code
by Ethan (Project mod, admin & developer)

If anyone is interested, you can gain access to the Rosetta source code by working with the U of Washington licensing folks. Suggestions on how to improve the code would be forwarded to the lab, and if accepted, worked into a future release. Here's the info to get started:

http://depts.washington.edu/ventures/UW_Technology/Express_Licenses/Rosetta/

Digital Ventures
UW TechTransfer
4311 11th Avenue NE, Suite 500
Seattle, WA 98105-4608
Phone: (206) 616-3451
Fax: (206) 616-3322
Email: license@u.washington.edu

Long rambling topic you can pretty much ignore all but the first post.
https://boinc.bakerlab.org/rosetta/forum_thread.php?id=349&nowrap=true
by David Baker (Head Honcho of R@H!)

I see from recent discussions on the message boards that there are serious concerns about code release because of the possibilities for cheating in gaining credits. We thought it would be good to give out the code because we thought 1) people would be interested in seeing it, 2) compilation and code performance on a much wider array of platforms than we have in house could be optimized and 3) experts could experiment with variations on search strategies. But because of the many concerns I am reconsidering this--keeping all of you happy is clearly critical!

It would be good to have an idea of how many are in favor and how many are against code release in the current setup.

I've argued against redundancy in the past because it is a waste of resources. But perhaps we should go to two fold redundancy because of the credit issue. How about this: when we get to 1,000,000 credits per day, we go to two fold redundancy and give out the code. (Anybody want to place a bet on when we break the 1,000,000 a day mark?)

I like the following suggestion, if we can do this it would be a good solution and avoid the need for redundancy.

"BOINC V5.x has the SETI-beta "flop counting" code in it. Using that would both eliminate cheating-via-benchmarks, and would be a good example of the "improved" method for other projects to follow."

what do people think?

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Team mauisun.org